1. Field of the Invention
The present invention relates to a method of manufacturing an electronic device having fine patterns, more particularly to a method of manufacturing a semiconductor integrated circuit device having a plurality of fine circuit patterns.
2. Prior Art
In the manufacture of semiconductor integrated circuit devices, repetitive use is made of an epitaxial process such as a chemical vapor deposition (CVD) process, a doping process such as ion implantation, a lithographic process, and an etching process. The operation speed and integration density of semiconductor integrated circuit devices can be effectively improved by miniaturizing the circuit patterns and enhancing the dimensional accuracy, as has increasingly been done in recent years. The miniaturization of circuit patterns mainly depends on lithography, so lithography plays a vital role in the manufacture of semiconductor integrated circuit devices.
Lithographic technology mainly employs a projection aligner that forms device patterns by transferring the pattern of a photomask mounted in the projection aligner to the surface of a semiconductor wafer. At this time, the exposure area of a high-resolution projection aligner is smaller than the area of a semiconductor wafer, so the exposure is divided into a plurality of shots which are stepped or scanned to repeat the exposure of the chip area a plurality of times. The size of a chip depends on the product to be made, so a photomask is, in general, provided with an outer frame referred to as a shade area made of a metal such as chromium (Cr) so that a desired shot size can be obtained. In this way, the single chip areas exposed by the plurality of shots are prevented from overlapping, and a scribe area is provided around the edge of each chip for dicing.
The need for higher integration and faster device operation has led to the increasing miniaturization of the patterns formed by lithography in recent years. In this context, research and development aimed at shortening the wavelength of exposure light used for exposing patterns in an optical aligner are being pursued.
Furthermore, a halftone phase-shifting exposure method is now being used. A halftone phase-shift mask is a translucent film (referred to as a halftone film) formed on a transparent plate to dim the exposure light and shift its phase. In general, a transmittance in the range of 1% to 25% of the exposure light is considered desirable.
Exposure light which passes through a halftone film is phase shifted with respect to exposure light which does not pass thorough the film. Either a single layer or a multi-layer halftone film can be used to produce the phase difference. Although phase differences of 180° and odd multiples thereof are needed to obtain the highest resolution, other phase differences within a range of 180°±90° are also effective in improving resolution. It is known that use of a halftone mask can improve the resolution by about 5% to 20%.
Descriptions of halftone phase-shifting can be found, for example, in documents such as JP-A No. H5-181257.
As described above, a halftone phase-shifting method is known as an exposure method that can resolve fine-dimensioned patterns with high resolution. This exposure method, however, has many problems as described below, making it difficult to obtain sufficient pattern transferring accuracy.
The halftone phase-shifting method causes interference between exposure light which has passed through the halftone part and exposure light which has passed through apertures therein, in the vicinity of the boundaries of the apertures and the halftone part, to enhance the optical contrast, thereby improving the resolution and exposure tolerances. For this reason, it is very critical to control the amount of exposure light passing through the halftone part, or the transmittance of the halftone part, and the amount of the phase shift.
In addition, the dimensional accuracy of the halftone film pattern has a profound effect on the dimensional accuracy of the transferred pattern. For a fine pattern near the resolution limit of the projection lens, the optical contrast becomes substantially lower due to light diffraction which, together with a factor referred to as the mask error enhancement factor (MEF), makes the dimensional accuracy of the transferred pattern lower than that of the pattern on the mask. The MEF is an indicator showing the amplification of the dimensional difference ΔLm of a transferred pattern in relation to the dimensional difference ΔLw of the pattern on a mask, and is given by the equation MEF=ΔLm/(M·ΔLw), where M is the reduction factor of the projection lens. If a 5× lens is used, then M is ⅕. In a case with a fine pattern using a halftone phase-shift mask, the pattern is generally transferred with an MEF of 2 to 3, so that unwanted variations in the dimensions of the pattern on the mask are amplified by a factor of 2M to 3M.
In the manufacturing processes of a semiconductor integrated circuit device, a step that requires particularly high dimensional accuracy in a fine pattern is the patterning step for the gate electrodes of transistors. As the dimensions of the gate electrodes become smaller, the operation speed of the transistors becomes higher. High dimensional accuracy of the gate electrodes enables stable operation of the circuit and thus enables high-speed circuits to work together, consequently increasing the added value of a semiconductor integrated circuit device. In addition, if fine patterns can be formed with higher accuracy in the wiring patterning process, interconnection wirings can result in a higher packing density and shorter length, which also contribute to high-speed circuit operation and a higher integration density.
However, if the conventional halftone phase-shift exposure method is adopted for extremely fine gate, wiring, and hole patterning processes, there is a problem in that sufficient dimensional accuracy cannot be obtained due to the inadequate controllability of the phase and transmittance of the halftone phase-shift mask and variations of dimensions on the mask, and consequently the reproducibility and yield of the manufacturing process cannot be improved.